rawEthernet - Modtronix SBC68EC based module

Back to VSCP Modules

Current Harware Version: Rev 2
Current Firmware version: 0.0.1

About

:!::!::!: This is work in progress!!! Information here will change during development. :!::!::!:

This module demonstrates the use of raw ethernet togehter with VSCP.

To use this sample you need to

  1. Load the firmware into the Modtronix board. You can't use the bootloader of the board and must program the board with a programmer. It would be possible to change the project so it work with the built in bootloader but we leave that as an execise.
  1. You must add the raw ethernet driver (rawethernet.dll) to the daemon. This driver is included in the VSCP & Friends distribution and can be found in the installation folders (drivers/level2). You find a description on how to install the driver in the specification document section 31.7.3 Raw ethernet driver.

A typical vscpd.conf example looks like this. You find the vscpd.conf file in /ProgramData/vscp on a windows machine and at /etc/vscp on a Linux machine.

<vscpdriver>
    <driver> 		   	 			
        <name>rawethernet</name> 		   	 		
        <parameter>
            \Device\NPF_{E95A7EC7-0E8E-4C02-BD5D-6D2063650263};00:26:55:CA:1F:DA
        </parameter>
        <path>		            
            C:\Program Files (x86)\VSCP\drivers\level2\rawethernet.dll
        </path> 		   	 			
        <flags>0</flags> 		 		
    </driver> 
 </vscpdriver>

Download

There is nothing too download yet.

Firmware

Version 0.0.1

  • Source: No release yet. See software repository.
  • Hex: No release yet. See software repository.

Schematics

Registers

The module accept Level II read/write register events. The space is limited on the modules so a maximum of 24 registers can be read or written in one operation. All Level I CLASS1.PROTOCOL events are implemented, but only the read and write CLASS2.PROTOCOL events. Registers can therefore be read and written both with level I and Level II events.

Zone information

Register 0(0x00) - Zone.
Register 1(0x01) - Subzone base for I/O. Lowest 5 bits should be zero (ignored) 
                   and are used for I/O pins 
                   and other zoned functionality as follows.
 
                   0 - General subzone for module.

                   1 - subzone for Input 0.
                   2 - subzone for Input 1.
                   3 - subzone for Input 2.
                   4 - subzone for Input 3.
                   5 - Reserved.
                   6 - Reserved.
                   7 - Reserved.
                   8 - Reserved.

                   9 - subzone for Output 0.
                   10 - subzone for Output 1.
                   11 - subzone for Output 2.
                   12 - subzone for Output 3.
                   13 - subzone for Output 4.
                   14 - subzone for Output 5.
                   15 - subzone for Output 6.
                   16 - Reserved.

                   17 - subzone for pin PWM Output.

                   18 - subzone for A/D 0.
                   19 - subzone for A/D 1.
                   20 - subzone for A/D 2.
                   21 - subzone for A/D 3.
                   22 - Reserved.
                   23 - Reserved.
                   24 - Reserved.
                   25 - Reserved.    

                   26 - Subzone for serial channel.
     
                   27 - Subzone for CAN channel.
                   
                   28 - Reserved. 
                   29 - Reserved. 
                   30 - Reserved. 
                   31 - Reserved.         
Register 2(0x02) - Reserved

General Module Settings

Register 3(0x03) - Module Control Register.
  • Bit 0 - Enable external Vref- on RA2.
  • Bit 1 - Enable external Vref+ on RA3.
  • Bit 2 - Reserved.
  • Bit 3 - Reserved.
  • Bit 4 - Make PWM value persistent. PWM_PERSISTENT_BIT
  • Bit 5 - Reserved.
  • Bit 6 - Enable Output periodic events. ENABLE_PERIODIC_OUTPUT_EVENTS
  • Bit 7 - Enable Input periodic events. ENABLE_PERIODIC_INPUT_EVENTS

Note on PWM_PERSISTENT_BIT
If you want to write just a persitent value for the PWM and after that current PWM values that should not be persistent. Enable this bit, write a value and the reset the bit again. This will load the PWM with the value written when the bit was set on the next startup.

For Output/Input events CLASS1.DATA TYPE=1 (I/O) is sent with data coding set to 0x20 (vscp_specification_data_coding). This means the frame get the following content

Byte Description
0 Data Coding = 0x20
1 Output status
Register 4(0x04) - Auto event interval in seconds. 0 is disabled. Read/write.

Set the interval in seconds between inteval events.

Input Status

Register 5(0x05) - Input status, bit 0-7.

Read the input state for one of the buffered input bits.

Output Status

Register 6(0x06) - Output status, bit 0-7.

A/D Control Registers

Register 7(0x07) - A/D Control Register periodic events.

Set corresponding bit in this register to enable periodic events.

Register 8(0x08) - A/D Control Register Alarm low.

Set corresponding bit in this register to enable low alarm.

Register 9(0x09) - A/D Control Register Alarm high.

Set corresponding bit in this register to enable low alarm.

Output Control Registers

Register 10(0x0A) - Output 0 Control Register.  Read/Write
Register 11(0x0B) - Output 1 Control Register.  Read/Write
Register 12(0x0C) - Output 2 Control Register.  Read/Write
Register 13(0x0D) - Output 3 Control Register.  Read/Write
Register 14(0x0E) - Output 4 Control Register.  Read/Write
Register 15(0x0F) - Output 5 Control Register.  Read/Write
Register 16(0x10) - Output 6 Control Register.  Read/Write
Register 17(0x11) - Output 7 Control Register.  Read/Write

The output control bits enable disable intelligent output functionality

  • Bit 0 - Initial startup output state. 1 = high, 0=low.
  • Bit 1 - Reserved.
  • Bit 2 - Protection timer enable.
  • Bit 3 - Reserved.
  • Bit 4 - Reserved.
  • Bit 5 - Reserved.
  • Bit 6 - Reserved.
  • Bit 7 - If set to one the output is enabled. Disabled output stays at initial state.

Input Control Registers

Register 18(0x12) - Input 0 Control Register.  Read/Write
Register 19(0x13) - Input 1 Control Register.  Read/Write
Register 20(0x14) - Input 2 Control Register.  Read/Write
Register 21(0x15) - Input 3 Control Register.  Read/Write
Register 22(0x16) - Input 4 Control Register.  Read/Write
Register 23(0x17) - Input 5 Control Register.  Read/Write
Register 24(0x18) - Input 6 Control Register.  Read/Write
Register 25(0x19) - Input 7 Control Register.  Read/Write

The input control bits enable disable intelligent input functionality

  • Bit 0 - Reserved.
  • Bit 1 - Send Alarm event when input goes to high state.
  • Bit 2 - Send Off event when input goes to low state.
  • Bit 3 - Send On event when input goes to high state.
  • Bit 4 - Reserved.
  • Bit 5 - Reserved.
  • Bit 6 - Reserved.
  • Bit 7 - If set to one the input is enabled.

Output Protection time Registers

Register 26(0x1A) - Protection time output 0 (seconds) MSB. Read/Write
Register 27(0x1B) - Protection time output 0 (seconds) LSB. Read/Write
Register 28(0x1C) - Protection time output 1 (seconds) MSB. Read/Write
Register 29(0x1D) - Protection time output 1 (seconds) LSB. Read/Write
Register 30(0x1E) - Protection time output 2 (seconds) MSB. Read/Write
Register 31(0x1F) - Protection time output 2 (seconds) LSB. Read/Write
Register 32(0x20) - Protection time output 3 (seconds) MSB. Read/Write
Register 33(0x21) - Protection time output 3 (seconds) LSB. Read/Write
Register 34(0x22) - Protection time output 4 (seconds) MSB. Read/Write
Register 35(0x23) - Protection time output 4 (seconds) LSB. Read/Write
Register 36(0x24) - Protection time output 5 (seconds) MSB. Read/Write
Register 37(0x25) - Protection time output 5 (seconds) LSB. Read/Write
Register 38(0x26) - Protection time output 6 (seconds) MSB. Read/Write
Register 39(0x27) - Protection time output 6 (seconds) LSB. Read/Write
Register 40(x028) - Protection time output 7 (seconds) MSB. Read/Write  
Register 41(0x29) - Protection time output 7 (seconds) LSB. Read/Write

This is the output protection time. An output will be inactivated if not written to before this time has elapsed.
Set to zero to disable (default). The max time is 65535 seconds which is about 18 hours.

The registers can be as an example be used as a security feature to ensure that an output is deactivated after a preset time even if the controlling device failed to deactivate the relay.

A/D Registers

Register 42(0x2A) - A/D value 0 MSB. Read Only.
Register 43(0x2B) - A/D value 0 LSB. Read Only.
Register 44(0x2C) - A/D value 1 MSB. Read Only.
Register 45(0x2D) - A/D value 1 LSB. Read Only.
Register 46(0x2E) - A/D value 2 MSB. Read Only.
Register 47(0x2F) - A/D value 2 LSB. Read Only.
Register 48(0x30) - A/D value 3 MSB. Read Only.
Register 49(0x31) - A/D value 3 LSB. Read Only.
Register 50(0x32) - Reserved.
Register 51(0x33) - Reserved.
Register 52(0x34) - Reserved.
Register 53(0x35) - Reserved.
Register 54(0x36) - Reserved.
Register 55(0x37) - Reserved.
Register 56(0x38) - Reserved.
Register 57(0x39) - Reserved.

The read value is in the range 0-1023.

Register 58(0x3A) - Reserved.
Register 59(0x3B) - Reserved.
Register 60(0x3C) - Reserved.
Register 61(0x3D) - Reserved.
Register 62(0x3E) - Reserved.
Register 63(0x3F) - Reserved.
Register 64(0x40) - Reserved.
Register 65(0x41) - Reserved.

PWM Registers

Register 66(0x42) - PWM value MSB. Read/Write.
Register 67(0x43) - PWM value LSB. Read/Write.

The read/written value is in the range 0-1023. Both values has to be written to actually set the PWM. The data is transfered to the PWM register when the LSB byte is written.

The value here is normally not persistent so a reset will write zero. However it is possible to make it persistent by enabling the PWM_PERSISTENT_BIT in the module control register.

Values greater the 0x3ff written to the PWMregisters will be masked to appropriate value.

Serial Channel

Register 68(0x44) - Serial baudrate + control bits.
  • Bits 0-3
Code Baudrate
0 300 baud
1 1200 baud
2 2400 baud
3 4800 baud
4 9600 baud
5 19200 baud
6 38400 baud
7 57600 baud
8 115200 baud
9 230400 baud
10 460800 baud
11 921600 baud
  • bits 4-7 reserved
Register 69(0x45) - Reserved. 
Register 70(0x46) - Serial channel control register.
  • Bit 0 - Enable confirm events.
  • Bit 1 - Reserved.
  • Bit 2 - Reserved.
  • Bit 3 - Reserved.
  • Bit 4 - Enable serial stream events output to serial channel.
  • Bit 5 - Enable serial stream events on input from serial channel.
  • Bit 6 - Port open status. Set to one to open zero to close port. Read to see if open/closed.
  • Bit 7 - Persistent open/close. Set state for port when board is started.

Min A/D Registers

Register 71(0x47) - A/D min value 0 MSB. Read/Write.
Register 72(0x48) - A/D min value 0 LSB. Read/Write.
Register 73(0x49) - A/D min value 1 MSB. Read/Write.
Register 74(0x4A) - A/D min value 1 LSB. Read/Write.
Register 75(0x4B) - A/D min value 2 MSB. Read/Write.
Register 76(0x4C) - A/D min value 2 LSB. Read/Write.
Register 77(0x4D) - A/D min value 3 MSB. Read/Write.
Register 78(0x4E) - A/D min value 3 LSB. Read/Write.
Register 79(0x4F) - A/D min value 4 MSB. Read/Write.
Register 80(0x50) - A/D min value 4 LSB. Read/Write.
Register 81(0x51) - A/D min value 5 MSB. Read/Write.
Register 82(0x52) - A/D min value 5 LSB. Read/Write.
Register 83(0x53) - A/D min value 6 MSB. Read/Write.
Register 84(0x54) - A/D min value 6 LSB. Read/Write.
Register 85(0x55) - A/D min value 7 MSB. Read/Write.
Register 86(0x56) - A/D min value 7 LSB. Read/Write.

Max A/D Registers

Register 87(0x57) - A/D min value 0 MSB. Read/Write.
Register 88(0x58) - A/D min value 0 LSB. Read/Write.
Register 89(0x59) - A/D min value 1 MSB. Read/Write.
Register 90(0x5A) - A/D min value 1 LSB. Read/Write.
Register 91(0x5B) - A/D min value 2 MSB. Read/Write.
Register 92(0x5C) - A/D min value 2 LSB. Read/Write.
Register 93(0x5D) - A/D min value 3 MSB. Read/Write.
Register 94(0x5E) - A/D min value 3 LSB. Read/Write.
Register 95(0x5F) - A/D min value 4 MSB. Read/Write.
Register 96(0x60) - A/D min value 4 LSB. Read/Write.
Register 97(0x61) - A/D min value 5 MSB. Read/Write.
Register 98(0x62) - A/D min value 5 LSB. Read/Write.
Register 99(0x63) - A/D min value 6 MSB. Read/Write.
Register 100(0x64) - A/D min value 6 LSB. Read/Write.
Register 101(0x65) - A/D min value 7 MSB. Read/Write.
Register 102(0x66) - A/D min value 7 LSB. Read/Write.

Hysteresis for A/D Alarm Register

Register 103(0x67) - A/D alarm hysteresis. Read/Write.

There must be a difference with this amount from the A/D alarm value for an alarm state to be reseted.

CAN Control (only with SBC68EC)

Register 104(0x68) - CAN control 
  • Bit 0-3 - CAN bitrate.
    • 0 - 10 kbps
    • 1 - 20 kbps
    • 2 - 50 kbps
    • 3 - 100 kbps
    • 4 - 125 kbps (default)
    • 5 - 250 kbps
    • 6 - 500 kbps
    • 7 - 800 kbps
    • 8 - 1000 kbps
  • Bit 4 - Reserved.
  • Bit 5 - Reserved.
  • Bit 6 - CAN channel open status. Set to one to open zero to close channel. Read to see if open/closed.
  • Bit 7 - Persistent open/close. Set state for channel when board is started.
Register 105(0x69) - CAN mask for type MSB
Register 106(0x6A) - CAN mask for type 
Register 107(0x6B) - CAN mask for type 
Register 108(0x6C) - CAN mask for type LSB

mask for VSCP CAN traffic

Register 109(0x6D) - CAN filter for class MSB
Register 110(0x6E) - CAN filter for class
Register 111(0x6F) - CAN filter for type 
Register 112(0x70) - CAN filter for type LSB

filter for VSCP CAN traffic

GUID for CAN channel. This is a full GUID without the least significant byte which is used as a nickname id for units on the CAN bus. Events sent from the CAN bus is translated using the nickname and this GUID. Events sent to this GUID is is sent out on the CAN bus usning the least significant byte as the nickname.

Register 113(0x71) - CAN Channel GUID MSB
Register 114(0x72) - CAN Channel GUID
Register 115(0x73) - CAN Channel GUID
Register 116(0x74) - CAN Channel GUID
Register 117(0x75) - CAN Channel GUID
Register 118(0x76) - CAN Channel GUID
Register 119(0x77) - CAN Channel GUID
Register 120(0x78) - CAN Channel GUID
Register 121(0x79) - CAN Channel GUID
Register 122(0x7A) - CAN Channel GUID
Register 123(0x7B) - CAN Channel GUID
Register 124(0x7C) - CAN Channel GUID
Register 125(0x7D) - CAN Channel GUID
Register 126(0x7E) - CAN Channel GUID
Register 127(0x7F) - CAN Channel GUID LSB-1

Page 1,2,3,4 holds four each of the decision Matrix rows.

Level II register Space

Register space above 0xff is available for level II. Space between 0x100 and 0x2ff is recserved for the sixteen decision matrix rows. Space between 0x10000 and 0x1ffff is the raw content of the external EEPROM. Space above 0x8000 is used for web pages so if the web server is used this space should not be used. Space between 0x2000 - 0x7ffff is not used by the module at the moment and can be used freely by the user.

Registers for Decision Matrix

The decison Matrix for the Nova module is of Level II type
1)
and there can be a maximum of 16 rows with an max argument count of max 18 bytes making each DM entry a total of 14 + 18 = 32 bytes. The page feature of the register space is useed to address thees registers using CLASS1.PROTOCOL events and in register space 256 and upwards for CLASS2.PROTOCOL events.

For CLASS1.PROTOCOL the MSB byte of the address below is the LSB of the page select (MSB is always 0x00).

  • 0x0100 - DM row 0
  • 0x0120 - DM row 1
  • 0x0140 - DM row 2
  • 0x0160 - DM row 3
  • 0x0180 - DM row 4
  • 0x01A0 - DM row 5
  • 0x01C0 - DM row 6
  • 0x01E0 - DM row 7
  • 0x0200 - DM row 8
  • 0x0220 - DM row 9
  • 0x0240 - DM row 10
  • 0x0260 - DM row 11
  • 0x0280 - DM row 12
  • 0x02A0 - DM row 13
  • 0x02C0 - DM row 14
  • 0x02E0 - DM row 15

The matrix can also be reached in Level I register space on page 1,2,3,4 each with four rows.

Decision Matrix

Format of DM

The module have a decision matrix with 16 entries.

DM enteries are handled in order and if more then one row match the corresponding action will be carried out wiyj the firts entry found followed by higer numbers. This means sending aserial string can consist of many rows that each will send out there content.

Available Actions

0(0x00) - NOOP, No action.
1(0x01) - Activate output(s) given by argument. The argument is a bit array where bit 0 is 
          relay 1 and so on. 
          Byte 1 is Zone and byte 2 is zone page and must be equal to register content to 
          trigger action.
2(0x02) - Deactivate output(s) given by argument. The argument is a bit array where bit 0 is 
          relay 1 and so on.  
          Byte 1 is Zone and byte 2 is zone page and must be equal to register content to 
          trigger action.
3(0x03) - Send data in argument on serial port. Data should be NULL terminated.
4(0x04) - Send predefined data on serial port from file as of argument. The file should be 
          compiled in as on of the files that build up the web pages.
5(0x05) - Open serial port.
6(0x06) - Close Serial port.
7(0x07) - Open CAN port.
8(0x08) - Close CAN port.
9(0x09) - Send data in argument on CAN port.
               Argument Byte 0 - MSB of CLASS  ( Level I class can be max 511 )
               Argument Byte 1 - LSB of CLASS 
               Argument Byte 2 - MSB of TYPE 
               Argument Byte 3 - LSB of TYPE       
               Argument Byte 4 - LSB of TYPE
               Argument Byte 5 - Datacount (0-8)
               Argument Byte 6-13 - data
10(0x0a) - Send Output status. The argument is a bit array where bit 0 is output 0 and so on. 
           ON/OFF events are sent.
11(0x0b) - Send Input status. The argument is a bit array where bit 0 is input 0 and so on. 
           ON/OFF events are sent.
12(0x0c) - Send A/D value(s). The argument is a bit array where bit 0 is A/D 0 and so on. 
           A/D event is sent.
13(0x0d) - Send Output status. I/O event is sent instead of ON/OFF events as of above.
14(0x0e) - Send Input status. I/O event is sent instead of ON/OFF events as of above.
15(0x0f) - Set PWM as of argument. Byte 0 is MSB, Byte 1 is LSB.
16(0x10) - Reserved. 

Alarm register

  • Bit 0 - A/D High/Low Alarm.
  • Bit 7 - Alarm condition.

Events

On

If enabled the event is sent when a input/outputgoes to its active state.

Class: 0x014 
Type: 0x03

Package:

Byte 0: Index.
Byte 1: Zone
Byte 2: Subzone

Index is always 0.

Off

If enabled the event is sent when a input/outputgoes to its inactive state.

Class: 0x014 
Type: 0x04

Package:

Byte 0: index.
Byte 1: Zone
Byte 2: Subzone

Index is always 0.

Stopped

If enabled the event is sent when a input/outputgoes to its inactive state.

Class: 0x014 
Type: 0x18

Package:

Byte 0: index.
Byte 1: Zone
Byte 2: Subzone

Index is always 0.

Started

If enabled the event is sent when a input/output goes to its active state.

Class: 0x014 
Type: 0x19

Package:

Byte 0: index.
Byte 1: Zone
Byte 2: Subzone

Index is always 0.

Alarm

If enabled the event is sent when a output goes to its low state after a protection timer have timed out or when an input goes to a triggered state.

Class: 0x001 
Type: 0x02

Package:

Byte 0: index.
Byte 1: Zone
Byte 2: Subzone

Index is always 0.

I/O value

I/O measurements are sent with this event.

Class: 0x00f
Type: 0x01

Package:

Byte 0: Datacoding.
Byte 1: I/O value

The datacoding is set to integer and is 0b01100xxx where xxx = 0 for inputs and xxx = 1 for outputs.

A/D value

A/D measurements are sent with this event.

Class: 0x00f 
Type: 0x02

Package:

Byte 0: Datacoding.
Byte 1: MSB of A/D reading.
Byte 2: LSB of A/D reading.

The datacoding is set to integer and is 0b01100xxx where xxx is index for A/D converter.

Node Heartbeat

Node heartbeat send out.

Class: 0x014 
Type: 0x02

Package:

Byte 0: 0.
Byte 1: Zone.
Byte 2: 0 (subzone for module).

A heartbeat is sent once every minute.

Stream Data with zone.

Node heartbeat send out.

Class: 0x014 
Type: 0x26

Package:

Byte 0: Zone.
Byte 1: SubZone.
Byte 2: Sequence number.
Byte 3-7: Serial data

Use this event to send serial data to the serial channel of the module. Also this event is sent from the module when data is received on the serial channel. Confirm events are sent when stream data is received.

Hardware configuration

Nova connectors

Pin Description
1 GND
2 +5V
3 ANALOG0
4 ANALOG1
5 ANALOG2
6 ANALOG3
7 VREF-
8 VREF+
9 OUTPUT0
10 OUTPUT1
11 OUTPUT2
12 OUTPUT3
13 OUTPUT4
14 OUTPUT5
15 OUTPUT6
16 CD+
17 PWM_OUT
18 Input GND
19 NC
20 NC
21 INPUT3
22 INPUT2
23 INPUT1
24 INPUT0

Modtronix - Connector 1

Pin Description Nova usage
1 RF5 AD5
2 RF4 AD4
3 RF7 Input 6
4 RF6 AD6
5 GND GND
6 /MCLR RESET
7 5V 0.5A 5V
8 Unregulated input voltage Power Out on CAN connector
9 RA1 Input 7
10 RA0 AD7
11 RA3 Vref+
12 RA2(Vref-)
13 RA5 Input 5
14 RA4 Input 4
15 RC1 Input 1
16 RC0 Input 0
17 RC3 - I2C SCL I2C SCL
18 RC2 PWM
19 RG1 Reserved for TX2 on 18F6622
20 RG0 - CANTX on 18F6680 CANTX

Modtronix - Connector 2

Pin Description Nova usage
1 RF1 AD1
2 RF0 AD0
3 RF3 AD3
4 RF2 AD2
5 SIG1 TX1 - RS232 Levels
6 SIG0 RX1 - RS232 Levels
7 RB6 Output 6 / ICP
8 RB7 Output 7 / ICP
9 RB4 Output 4
10 RB5 Output 5
11 RB2 Output 2
12 RB3 Output 3
13 RB0 Output 0
14 RB1 Output 1
15 RC6 TX1 - TTL Levels
16 RC7 RX1 - TTL Levels
17 RC4 I2C SDA
18 RC5 Input 2
19 RG2 - CANRX on 18F6680 also RX2 18F6622 CANRX
20 RG3 Input 3

Inputs

Description Pin Nova Connector
Input 0 RC0
Input 1 RC1
Input 2 RC5
Input 3 RG3

Outputs

Description Pin Nova Connector
Output 0 RB0
Output 1 RB1
Output 2 RB2
Output 3 RB3
Output 4 RB4
Output 5 RB5
Output 6 RB6 Also connected to the board LED
Output 7 RB7 This pin is not connected to external connector

Note: next rev change RB6 and RB7 position.

A/D Channels

Description Pin Nova Connector
Analog 0 RF0
Analog 1 RF1
Analog 2 RF2
Analog 3 RF3
Analog 4 or VREF- RA2
Analog 5 or VREF+ RA3
Analog 6 RA0 Not used on Nova
Analog 7 RA1 Not used on Nova

Confirm.

Node heartbeat send out.

Class: 0x014 
Type: 0x27

Package:

Byte 0: Zone.
Byte 1: SubZone.
Byte 2: Sequence number.
Byte 3: Class MSB
Byte 4: Class LSB
Byte 5: Type MSB
Byte 6: Type LSB

Notes

SBC65EC - 18F6621

  1. 64k flash
  2. 3840 RAM
  3. RC2,4,5 I2C/SPI
  4. Two UARTS, RC6-TX1, RC7-RX1, RG1-TX2, RG2-RX2

SBC68EC - 18F6680

  1. 64k flash
  2. 3328 RAM
  3. 1024 EEPROM
  4. CAN enabled. RG0 - CANTX, RG2 - CANRX
 
modules/rawethernet.txt · Last modified: 2014/03/27 06:23 (external edit)
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